~  : 4 B! "d C } >I ^ i "Q1t8W1OD)$-4CDx8i`-)=!81V:M@0Wq27#4qXsk>"(HX'w&a5+S$%%$ 3 O %p   )  !:!3T!!! !3!&"&8"8_"$"""""#)7#a#|##V$)u$$$0$ %&%F%]%'y%%%%.%9&=S&&&&&+&%' E' f'3'':' ( *(K(d(x((((!( )$)C)a)):-+&h+3++C+@,<\,^,i- b.p..9..W01:3Dl3)3$3-44.4Bc464j4H5,g5(5<5 560869i66L6@7WO73858#9r59t9l::":(:I:9<'X<&<<<`>?*3?$^?%?/?.?@&@ B@%c@@@)@@ A-A3GA{AA A3A&B&+B8RB$BBBB"C)*CTCoCCID(hDDD0DD&E6EOE'kEEEE/E9 F=FF!F%FFF*G"1G TG uG3GG:GH 9HZHsHHHHH!HI3IRIpIe;pG.?jK5< QLF{[Hv1DYx246z= 8+IsowWl#@aC(^3_mhnJR>]i) ryZSdBE7VU$ !\%'Ob&"uq*ftPN ,| }-9~/gTAc:0MkX` -O0 assembler will not perform any optimizations --32/--64 generate 32bit/64bit code --divide do not treat `/' as a comment character --divide ignored -O try to optimize code. Implies -parallel -Q ignored -V print assembler version number -k ignored -V print assembler version number -Qy, -Qn ignored -mtune=CPU optimize for CPU, CPU is one of: i8086, i186, i286, i386, i486, pentium, pentiumpro, pentiumii, pentiumiii, pentium4, prescott, nocona, core, core2, corei7, l1om, k6, k6_2, athlon, k8, amdfam10, generic32, generic64 -n Do not optimize code alignment -q quieten some warnings -s ignored @FILE read options from FILE %s: unrecognized processor name'%s' is not repeatable. Resulting behavior is undefined.-KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimization for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: -l use 1 word for refs to undefined symbols [default 2] -pic, -k generate position independent code -S turn jbsr into jsr --pcrel never turn PC-relative branches into absolute jumps --register-prefix-optional recognize register names without prefix character --bitwise-or do not treat `|' as a comment character --base-size-default-16 base reg without size is 16 bits --base-size-default-32 base reg without size is 32 bits (default) --disp-size-default-16 displacement with unknown size is 16 bits --disp-size-default-32 displacement with unknown size is 32 bits (default) .sblock may be used for initialized sections only68040 and 68851 specified; mmu instructions may assemble incorrectly: unrecognizable hyperprivileged register: unrecognizable privileged register: unrecognizable v9a ancillary state register: unrecognizable v9a or v9b ancillary state registerAbsolute PC-relative value in relaxation code. Assembler error.....Absolute value in relaxation code. Assembler error.....Address mode *+ARx is not allowed in memory-mapped register addressing. Resulting behavior is undefined.Can not do %d byte %srelocationCan not do %d byte pc-relative pic relocationCan not do %d byte pc-relative relocationCan not do %d byte pc-relative relocation for storage type %dCan not do %d byte pic relocationCan not do %d byte relocationCan not do %d byte relocation for storage type %dCan not represent %s relocation in this object file formatCan not set dlx_skip_hi16_flagCondition <%c%c> in structured control directive can not be encoded correctlyCurrent section is unitialized, section name required for .clinkD10V options: -O Optimize. Will do some operations in parallel. --gstabs-packing Pack adjacent short instructions together even when --gstabs is specified. On by default. --no-gstabs-packing If --gstabs is specified, do not pack adjacent instructions together. Immediates %d and %d will give undefined behavior.Incorrect fr_opcode value in frag. Internal error.....Instruction `%s' is not recognized.Instruction does not fit in available delay slots (%d-word insn, %d slots left). Resulting behavior is undefined.Instructions using long offset modifiers or absolute addresses are not repeatable. Resulting behavior is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behavior is undefined.Invalid dsp acc registerInvalid dsp/smartmips acc registerInvalid use of parallelization operator.MCORE specific options: -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis) -{no-}sifilter {dis}able silicon filter behavior (def: dis) -cpu=[210|340] select CPU type -EB assemble for a big endian system (default) -EL assemble for a little endian system Opcode `%s' is not recognized.Operand `%x' not recognized in fixup16.Operand `%x' not recognized in fixup8.Option `%s' is not recognized.SH options: --little generate little endian code --big generate big endian code --relax alter jump instructions for long displacements --renesas disable optimization with section symbol for compatibility with Renesas assembler. --small align sections to 4 byte boundaries, not 16 --dsp enable sh-dsp insns, and disable floating-point ISAs. --allow-reg-prefix allow '$' as a register name prefix. --isa=[any use most appropriate isa | dsp same as '-dsp' | fpSemantics error. This type of operand can not be relocated, it must be an assembly-time constantSubtype %d is not recognized.Symbol `%s' can not be both weak and commonTried to .set unrecognized mode `%s'Tried to set unrecognized symbol: %s Unbalanced parenthesis in %s operand.Unbalanced parenthesis in operand %dUnrecognized .LEVEL argument Unrecognized .type argumentUnrecognized condition code "%s"Unrecognized dependency specifier %d Unrecognized field type '%c'Unrecognized fix-up (0x%08lx)Unrecognized indirect address format "%s"Unrecognized instruction "%s"Unrecognized opcode format: `%s'Unrecognized opcode: `%s'Unrecognized operand list '%s' for instruction '%s'Unrecognized option "%s"Unrecognized option '-x%s'Unrecognized option following -KUnrecognized or unsupported floating point constantUnrecognized parallel instruction "%s"Unrecognized parallel instruction '%s'Unrecognized parallel instruction combination "%s || %s"Unrecognized predicate relation typeUnrecognized register name `%s'Unrecognized section '%s'Unrecognized status bit "%s"Unrecognized struct/union tag '%s'Unrecognized substitution symbol functionUnrecognized symbol suffixUnrecognized version '%s'VMS options: -+ encode (don't truncate) names longer than 64 characters -H show new symbol after hash truncation -replace/-noreplace enable or disable the optimization of procedure calls architecture `%s' unrecognizedcan not do %d byte pc-relative relocationcan not do %d byte relocationcan not resolve expressioncondition not followed by conditionalizable insncpu `%s' unrecognizeddsp immediate shift value not constantexpected closing parenextension `%s' unrecognizedignoring unrecognized .endian type `%s'invalid abi -mabi=%sinvalid movx dsp registerinvalid movy dsp registerinvalid operand, not a 11-bit signed value: %djunk at end of line, first unrecognized character is `%c'junk at end of line, first unrecognized character valued 0x%xmismatched parenthesesmissing closing parenthesisoption `%s' not recognizedparentheses ignoredsymbol `%s' can not be both weak and commonunbalanced parenthesis in operand %d.unknown floating point abi `%s' unrecognized .linkonce type `%s'unrecognized .section attribute: want a,w,x,M,S,G,Tunrecognized CPS flagunrecognized characters at end of parallel processing insnunrecognized default cpu `%s'unrecognized emulation name `%s'unrecognized fopt optionunrecognized opcodeunrecognized option -%c%sunrecognized reloc typeunrecognized relocation suffixunrecognized section attributeunrecognized section command `%s'unrecognized section typeunrecognized section type `%s'unrecognized symbol type "%s"unrecognized syntax mode "%s"Project-Id-Version: binutils Report-Msgid-Bugs-To: FULL NAME POT-Creation-Date: 2010-03-03 14:58+0100 PO-Revision-Date: 2010-03-09 07:23+0000 Last-Translator: Robert Readman Language-Team: English (United Kingdom) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Launchpad-Export-Date: 2011-02-05 06:25+0000 X-Generator: Launchpad (build 12309) -O0 assembler will not perform any optimisations --32/--64 generate 32bit/64bit code --divide do not treat `/' as a comment character --divide ignored -O try to optimise code. Implies -parallel -Q ignored -V print assembler version number -k ignored -V print assembler version number -Qy, -Qn ignored -mtune=CPU optimise for CPU, CPU is one of: i8086, i186, i286, i386, i486, pentium, pentiumpro, pentiumii, pentiumiii, pentium4, prescott, nocona, core, core2, corei7, l1om, k6, k6_2, athlon, k8, amdfam10, generic32, generic64 -n Do not optimise code alignment -q quieten some warnings -s ignored @FILE read options from FILE %s: unrecognised processor name'%s' is not repeatable. Resulting behaviour is undefined.-KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimisation for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: -l use 1 word for refs to undefined symbols [default 2] -pic, -k generate position independent code -S turn jbsr into jsr --pcrel never turn PC-relative branches into absolute jumps --register-prefix-optional recognise register names without prefix character --bitwise-or do not treat `|' as a comment character --base-size-default-16 base reg without size is 16 bits --base-size-default-32 base reg without size is 32 bits (default) --disp-size-default-16 displacement with unknown size is 16 bits --disp-size-default-32 displacement with unknown size is 32 bits (default) .sblock may be used for initialised sections only68040 and 68851 specified; MMU instructions may assemble incorrectly: unrecognisable hyperprivileged register: unrecognisable privileged register: unrecognisable v9a ancillary state register: unrecognisable v9a or v9b ancillary state registerAbsolute PC-relative value in relaxation code. Assembler error...Absolute value in relaxation code. Assembler error...Address mode *+ARx is not allowed in memory-mapped register addressing. Resulting behaviour is undefined.Cannot do %d byte %srelocationCannot do %d byte pc-relative pic relocationCannot do %d byte pc-relative relocationCannot do %d byte pc-relative relocation for storage type %dCannot do %d byte pic relocationCannot do %d byte relocationCannot do %d byte relocation for storage type %dCannot represent %s relocation in this object file formatCannot set dlx_skip_hi16_flagCondition <%c%c> in structured control directive cannot be encoded correctlyCurrent section is unitialised, section name required for .clinkD10V options: -O Optimise. Will do some operations in parallel. --gstabs-packing Pack adjacent short instructions together even when --gstabs is specified. On by default. --no-gstabs-packing If --gstabs is specified, do not pack adjacent instructions together. Immediates %d and %d will give undefined behaviour.Incorrect fr_opcode value in frag. Internal error...Instruction `%s' is not recognised.Instruction does not fit in available delay slots (%d-word insn, %d slots left). Resulting behaviour is undefined.Instructions using long offset modifiers or absolute addresses are not repeatable. Resulting behaviour is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behaviour is undefined.Invalid DSP acc registerInvalid DSP/smartmips acc registerInvalid use of parallelisation operator.MCORE specific options: -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis) -{no-}sifilter {dis}able silicon filter behaviour (def: dis) -cpu=[210|340] select CPU type -EB assemble for a big endian system (default) -EL assemble for a little endian system Opcode `%s' is not recognised.Operand `%x' not recognised in fixup16.Operand `%x' not recognised in fixup8.Option `%s' is not recognised.SH options: --little generate little endian code --big generate big endian code --relax alter jump instructions for long displacements --renesas disable optimisation with section symbol for compatibility with Renesas assembler. --small align sections to 4 byte boundaries, not 16 --dsp enable sh-dsp insns, and disable floating-point ISAs. --allow-reg-prefix allow '$' as a register name prefix. --isa=[any use most appropriate isa | dsp same as '-dsp' | fpSemantics error. This type of operand cannot be relocated, it must be an assembly-time constantSubtype %d is not recognised.Symbol `%s' cannot be both weak and commonTried to .set unrecognised mode `%s'Tried to set unrecognised symbol: %s Unbalanced bracket (parenthesis) in %s operand.Unbalanced bracket (parenthesis) in operand %dUnrecognised .LEVEL argument Unrecognised .type argumentUnrecognised condition code "%s"Unrecognised dependency specifier %d Unrecognised field type '%c'Unrecognised fix-up (0x%08lx)Unrecognised indirect address format "%s"Unrecognised instruction "%s"Unrecognised opcode format: `%s'Unrecognised opcode: `%s'Unrecognised operand list '%s' for instruction '%s'Unrecognised option "%s"Unrecognised option '-x%s'Unrecognised option following -KUnrecognised or unsupported floating point constantUnrecognised parallel instruction "%s"Unrecognised parallel instruction '%s'Unrecognised parallel instruction combination "%s || %s"Unrecognised predicate relation typeUnrecognised register name `%s'Unrecognised section '%s'Unrecognised status bit "%s"Unrecognised struct/union tag '%s'Unrecognised substitution symbol functionUnrecognised symbol suffixUnrecognised version '%s'VMS options: -+ encode (don't truncate) names longer than 64 characters -H show new symbol after hash truncation -replace/-noreplace enable or disable the optimisation of procedure calls architecture `%s' unrecognisedcannot do %d byte pc-relative relocationcannot do %d byte relocationcannot resolve expressioncondition not followed by conditionalisable insncpu `%s' unrecognisedDSP immediate shift value not constantexpected closing bracketextension `%s' unrecognisedignoring unrecognised .endian type `%s'invalid ABI -mabi=%sinvalid movx DSP registerinvalid movy DSP registerinvalid operand, not an 11-bit signed value: %djunk at end of line, first unrecognised character is `%c'junk at end of line, first unrecognised character valued 0x%xmismatched brackets (parentheses)missing closing bracket (parenthesis)option `%s' not recognisedbrackets (parentheses) ignoredsymbol `%s' cannot be both weak and commonunbalanced brackets in operand %d.unknown floating point ABI `%s' unrecognised .linkonce type `%s'unrecognised .section attribute: want a,w,x,M,S,G,Tunrecognised CPS flagunrecognised characters at end of parallel processing insnunrecognised default cpu `%s'unrecognised emulation name `%s'unrecognised fopt optionunrecognised opcodeunrecognised option -%c%sunrecognised reloc typeunrecognised relocation suffixunrecognised section attributeunrecognised section command `%s'unrecognised section typeunrecognised section type `%s'unrecognised symbol type "%s"unrecognised syntax mode "%s"